.. staff. Conducting research and publishing papers in academic journals. Representing the university at conferences and delivering presentations when necessary. Teaching and supervising undergraduate and postgraduate students. Providing demonstrations and supervising experiments and investigations. Answering .. read more
CPU Architecture and Logic Design Fortune 100 Organization Bangalore
Your Role and Responsibilities: As a Logic design lead in our Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL … Good understanding of HW / SW co design / accelerators to enhance system level performance. Collaborate with the Chip development, Unit Verification, Physical design, testgen, millcode teams to develop the feature. Pre-Silicon: Signoff the Design that meets all the functional, area and timing goals. Post Silicon: Validate the hardware functionality Required Professional and Technical Expertise: Minimum 6 – 15 + years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core. Experience with VLSI Design in VHDL / Verilog logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution.
Requirements : Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance.
Contact: Uday Mulya Technologies Email: muday_bhaskar@yahoo.com --
Your Role and Responsibilities: As a Logic design lead in our Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL … Good understanding of HW / SW co design / accelerators to enhance system level performance. Collaborate with the Chip development, Unit Verification, Physical design, testgen, millcode teams to develop the feature. Pre-Silicon: Signoff the Design that meets all the functional, area and timing goals. Post Silicon: Validate the hardware functionality Required Professional and Technical Expertise: Minimum 6 – 15 + years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core. Experience with VLSI Design in VHDL / Verilog logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution.
Requirements : Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance.
Contact: Uday Mulya Technologies Email: muday_bhaskar@yahoo.com --
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