.. VIP Integration • Interconnect Protocols: AHB, AXI, APB • SOC Interfaces: GPIO, SPI, I2C, UART (3+) • High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI (7+) • Memory Interfaces: DDR or HBM I/O (10+) • Coverage Closure: Code, Functional and Toggle • Tools: Synopsys VCS or Cadence Incsive .. read more
- Hands on experience in RTL Coding
- Able to write new Code (Given High Level AMS System Requirements) and/or update existing one
- Should be at ease with LINT-ing, Formal Verification and Clock-Domain-Crossing requirements
- Required to run LINT/CDC checks on code as and when required
- Generate constraint files for Timing and/or Power, as required
- Good debugging capabilities given Synthesis Results and/or Power Numbers
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